

KIMS Hardware Docs
v0.2  -- February 6, 1992
by Shaggy

(note: these docs are still subject to change, and may still
 contain errors-- however, they should be far more accurate than
 the supplied KIMS documentation.  If any errors are found, please
 contact me as soon as possible)



-----------------------------------------------------------------------------
Basic Memory Map:

00000000 - 005fffff   6 Megs RAM
00600000 - 00ffffff   RAM expansion (up to 10Mb)
01000000 - 01ffffff   reserved for bitmap video RAM (apparently unused)
20020000 - 2002ffff   configuration registers
200a0000 - 200a00ff   serial I/O registers
200b0000 - 200b00ff   256 bytes NVRAM
20040000 - 2007ffff   256K main PROM (four 8-bit chips)
20140000 - 2017ffff   128K video PROM (two 8-bit chips)
20180000 - 201bffff   64K network PROM (one 8-bit chip)
28000000 - 28ffffff   video control stuff
38000000 - 38ffffff   external scroll engine
3c000000 - 3cffffff   adder video chip

-----------------------------------------------------------------------------
Tables in RAM:
005fe800:	system vectors		


-----------------------------------------------------------------------------
Known vectors in system vector table at 5fe800:
[30]	console getchar	(20048bb8 for serial, 20048a75 for keyboard)
[34]	console putchar (20048ba1 for serial, 005fd974 for screen)
[38]	console ????	(20048ba1 for serial, 20048b46 for screen)

Note: the following vectors are added together (mod 256) by the PROM,
and compared to vector [ce], and if the results are inconsistent,
the system halts:
[ce] = [d2] + [d6] + [10] + [14] + [ca] + [0c]


-----------------------------------------------------------------------------
Configuration registers:

20020000:	configuration and test register
	<5>	line 3 is console (pins 8 & 9 connected)

-----------------------------------------------------------------------------



Special tables and vectors in the PROM:

20040000:	processor restart address
20040004:	system type register
20040020:	eight interrupt vector numbers
20040080:	vector to keyboard map (20050200)
20040084:	vector to keyboard mapping table (20052f28)
20050200:	keyboard table
20052f28:	keyboard mapping table

-----------------------------------------------------------------------------
Interrupt Control Registers:

2008000c:	INT_MSK (r/w)	interrupt mask control
2008000f:	INT_REQ (r)	interrupt requests pending
2008000f:	INT_CLR (w)	interrupt clear
	for all INT_MSK, INT_REQ, and INT_CLR:
	<0> IMASK_DC
	<1> IMASK_SC
	<2> IMASK_VS
	<3> IMASK_VF
	<4> IMASK_NS
	<5> IMASK_NP
	<6> IMASK_ST	serial transmit
	<7> IMASK_SR	serial receive

-----------------------------------------------------------------------------
Serial I/O Registers:

200a0000:	SER_CSR (r/w)	control and status register
200a0004:	SER_BUF	(r)	read buffer
200a0004:	SER_LPR	(w)	line parameter register
200a0008:	SER_TCR (r/w)	transmit control register
200a000c:	SER_MSR (r)	modem status register
200a000c:	SER_TDR (w)	transmit data register

-----------------------------------------------------------------------------
Non-volatile RAM (only bits 2-9 are valid in each longword)

200b0000:	WAT_SEC
200b0004:	WAT_ALMS
200b0008:	WAT_MIN
200b000c:	WAT_ALMM
200b0010:	WAT_HOUR
200b0014:	WAT_ALMH
200b0040:	base address of RAM vector table (005f8e1) (4 bytes)

-----------------------------------------------------------------------------



External Scroll Engine: (part B still undocumented)

38008000:	FILL_0		fill register for plane 0 (16 bits)
38008004:	FILL_1		fill register for plane 1 (16 bits)
38012000:	CURR_S_X	current source X address
38012004:	CURR_S_Y	current source Y address
38012008:	NEXT_S		next source X/Y address
3801200c:	CSR_A		status and control register
	<15> GO		execute scroll operation
	<14> INTEN	enable interrupt at end of scroll
	<13> GMODE	when set, don't wait for vertical blank
	 <6> FAST	when set, X inc = 32, Y inc = 2
	 <5> SXINC	0 = inc SX, 1 = dec SX
	 <4> SYINC	0 = inc SY, 1 = dec SY
	 <3> SMAJ	1 = (SX fast, SY slow) 0= (SY fast, SX slow)
	 <2> DXINC	0 = inc DX, 1 = dec DX
	 <1> DYINC	0 = inc DY, 1 = dec DY
	 <0> DMAJ	1 = (DX fast, DY slow) 0= (DY fast, DX slow)
38012010:	SOURCE_X_A	source X start address
38012014:	SOURCE_Y_A	source Y start address
38012018:	DEST_X_A	destination X start address
3801201c:	DEST_Y_A	destination Y start address
38014000:	END_S_X_A	source X end address
38014004:	END_S_Y_A	source Y end address
38014008:	END_D_X_A	destination X end address
3801400c:	END_D_Y_A	destination Y end address
38014010:	CLIP_RT		clip right  (x2)
38014014:	CLIP_LT		clip left   (x1)
38014018:	CLIP_BOT	clip bottom (y2)
3801401c:	CLIP_TOP	clip top    (y1)
 
-----------------------------------------------------------------------------



Adder Video System: (refer to VCB02 Video Subsystem docs for more info)

base 3c000000
[00]	ADCT	address counter
[02]	REQ	request enable
[04]	INT	interrupt enable
[06]	STAT	status bits
	<0>	pause complete
	<1>	scroll service (frame sync)
	<2>	rasterop init complete
	<3>	rasterop complete
	<4>	address output complete
	<5>	I/D data receive ready
	<6>	I/D data transmit ready
	<7>	I/D scroll data ready
	<8>	rasterop clipped at top
	<9>	rasterop clipped at bottom
	<10>	rasterop clipped at left
	<11>	rasterop clipped at right
	<12>	a portion of at least one rasterop unclipped
	<13>	vertical blanking
[0e]	IDD	I/D data
[10]	CMD	command register (same as [14])
[12]	MDE	rasterop mode
	<0-1>	00	normal mode
		01	reserved
		10	linear pattern mode
		11	fill mode
	<2>	0 = fill parallel to X, 1 = fill parallel to Y
	<3>	0 = normal two edge fill, 1 = baseline fill
	<4>	1 = hole fill enabled
	<5>	1 = first source indexing enable
	<6>	1 = destination indexing enable
	<7>	1 = pen down - writing enabled
[14]	CMD	command register (same as [10])
	<0-7>	8-bit I/D command
	<8-9>	00	cancel all active and pending commands
		01	I/D command
		10	rasterop command
		11	processor-to-bitmap or bitmap-to-processor
	<10>	destination enable
	<11>	first source enable
	<12>	second source enable
	<13>	test function (0)
	<14>	test function (0)
	<15>	reserved (0)




[16 - 28]	internal scroll engine -- DO NOT USE
[2a]	PXI	pending X index
[2c]	PYI	pending Y index
[2e]	NXI	new X index
[30]	NYI	new Y index
[32]	OXI	old X index
[34]	OYI	old Y index
[36]	CXMN	clip X min
[38]	CXMX	clip X max
[3a]	CYMN	clip Y min
[3c]	CYMX	clip Y max
[40]	FSDX	fast source 1 dx
[42]	SSDY	slow source 1 dy
[44]	SXO	source 1 X origin
[46]	SYO	source 1 Y origin
[48]	DXO	destination X origin
[4a]	DYO	destination Y origin
[4c]	FDX	fast destination DX
[4e]	FDY	fast destination DY
[50]	SDX	slow destination DX
[52]	SDY	slow destination DY
[54]	FSC	fast vector scale
[56]	SSC	slow vector scale
[58]	S2XO	source 2 X origin
[5a]	S2YO	source 2 Y origin
[5c]	S2HW	source 2 height and width
	<0-2>	tile width 2^(n+2)  (from 4 to 512)
	<3>	reserved (0)
	<4-6>	tile height 2^(h+2) (from 4 to 512)
	<7>	1 = height/width disabled (use destination)
[5e]	ERR1	error adjustment for slow destination
[60]	ERR2	error adjustment for fast destination

-----------------------------------------------------------------------------



I/D Bus Registers and I/D commands			
(must check for address output complete <4> and transmit ready <6>
 in status register before outputting new I/D data)
	load video register:  0x0180 + adr 
	Z-axis register load: 0x01a0 + reg:2<<2 + zblock:2(0)
			reg = 0 source register
			      1 foreground register
			      2 scroll fill register
			      3 background register
	RasterOp command:   0x06c0 + s1s2:2<<11 + func:2<<4 + csr:1<<2
	CPU to bitmap (X):  0x07c0 + func:2<<4 + csr:3
	Bitmap to CPU (X):  0x0bc0 + csr:3
	CPU to bitmap (Z):  0x07a4 + fb:1<<3 + zblock:2(0)
	bitmap to CPU (Z):  0x0bb0 + zblock:2(0)
	cancel		 :  0x0000


[0]	Resolution Mode
	<0-1>	00	1 plane
		01	2 planes
		10	undefined
		11	4 planes
[1]	Bus Width
	<2-3>	00	4-bit
		01	8-bit
		10	undefined
		11	16-bit
[2]	Scroll Constant	- Don't use (set bit 5 to 0, or just clear it)
[3]	Plane Address for Z-axis operations
	<0-3>	bit address within Z-axis block (0 to 15)
[4]	Logic Unit Function
	<0-3>	0000	F = 0x0000
		0001	F = NOT(D OR S)
		0010	F = NOT(D) AND S
		0011	F = NOT(D)
		0100	F = D AND NOT(S)
		0101	F = NOT(S)
		0110	F = D XOR S
		0111	F = NOT(D AND S)
		1000	F = D AND S
		1001	F = NOT(D XOR S)
		1010	F = S
		1011	F = NOT(D) OR S
		1100	F = D
		1101	F = D OR NOT(S)
		1110	F = D OR S
		1111	F = 0xffff
	<4>	0 = use mask1,		1 = use NOT(mask1)
	<5>	0 = use mask2,		1 = use NOT(mask2)
	<6>	0 = use NOT(source)	1 = use source
	<7>	0 = enable resolution mode for source register
[8]	Mask 1 (writing sets mask 2 also)
[9]	Mask 2
[A]	Source Register (usually loaded by source memory cycle) (Z-axis 00)
[B]	Fill for scrolling (ignore it) (Z-axis 10)
[C]	Left Scroll boundary (ignore)
[D]	Right Scroll boundary (...)
[E]	Background color (Z-axis address 11)
[F]	Foreground color (Z-axis address 01)



[10]	CSR0	controls first source read if bank 1 selected and src1 enab
[11]	CSR1	controls second source read if bank1 and src2
[12]	CSR2	controls destination read-modify-write if bank1
[14]	CSR4	controls first source read for bank2
[15]	CSR5	controls second source read for bank2
[16]	CSR6	controls destination read-modify-write for bank2
	<0-1>	external load - select register for incoming data
		00	none
		01	source
		10	mask 1 and mask 2
		11	mask 2
	<2-3>	internal load
		00	none
		01	source
		10	mask 1 and mask 2
		11	mask 2
	<4>	I/D bus output control (1 = enable output)
	<5>	barrel shifter delay control (1 = load delay register)
	
		

-----------------------------------------------------------------------------



Privileged Registers:	(internal processor registers)

00	KSP	kernel stack pointer
01	ESP	executive stack pointer
02	SSP	supervisor stack pointer
03	USP	user stack pointer
04	ISP	interrupt stack pointer
08	P0BR	P0 base register
09	P0LR	P0 length register
0a	P1BR	P1 base register
0b	P1LR	P1 length register
0c	S0BR	S0 base register
0d	S0LR	S0 length register
10	PCBB	process control block base
11	SCBB	system control block base
12	IPL	interrupt priority level
13	ASTLVL	AST level
14	SIRR	software interrupt request
15	SISR	software interrupt summary
18	ICSS	interval clock control
29	SAVISP	console saved interrupt stack pointer
2a	SAVPC	console saved PC
2b	SAVPSL	console saved PSL
38	MAPEN	memory management enable
39	TBIA	translation buffer invalidate all
3a	TBIS	translation buffer invalidate single
3e	SID	system identification
3f	TBCHK	translation buffer check

-----------------------------------------------------------------------------
System Control Block:

004	abort		machine check
008	abort		kernel stack invalid
00c	interrupt	power fail
010	fault		reserved/privileged instruction
014	fault		customer reserved instruction
018	fault/abort	reserved operand
01c	fault		reserved addressing mode
020	fault		access control violation
024	fault		translation not valid
028	fault		trace pending
02c	fault		breakpoint instruction
034	trap/fault	arithmetic
040	trap		CHMK 
044	trap		CHME
048	trap		CHMS
04c	trap		CHMU
084	interrupt	software levels 1-15
0c0	interrupt	interval timer
0c8	fault		emulation start
0cc	fault		emulation continue
100-1fc	interrupt	adapter vectors
200-3fc	interrupt	device vectors

-----------------------------------------------------------------------------




Video Information:

		Bitmap resolution:	2048 x 2048 x 2 planes
	Visible screen resolution:	1536 x 1152 x 2 planes (4 shades)
		Default font size:	16x22 character cell (256 characters)
		 Text screen size:	96x52 characters

Misc:
	Keyboard: LK201        -- see VCB02 Video SubSystem book
	Mouse:    DEC standard --   " "


